The demand for smaller consumer electronic devices, generally having extensive multimedia applications, increases the need for packing greater functionality into smaller spaces. Because it is not possible to create smaller devices by using chips to ‘build out,’ it is becoming common to build smaller devices by using chips to ‘build up,’ or stack the chips or die on top of one another. These stacks of chips or die are referred to as multi-chip packages (MCP's).
While MCP's may solve the density and space problems within devices, they create a variety of new challenges for testing the memory of the devices. MCP's often contain a stack of chips comprised of a variety of different types of memory chips, such as NAND, DRAM, NOR, and SRAM, just to name a few. Thus, it is important to have a reliable, efficient, and cost effective means for testing these different types of memory chips (MCP's) in devices.